Bipolar transistors comprise a family of semiconductor devices which exhibit excellent high-speed and high current carrying capabilities. The bipolar family of transistors is also well suited for high voltage operations, typically between five and fifty volts, and in some situations up to hundreds of volts. When operating at voltages above standard digital logic voltages, the electrical isolation between adjacent bipolar transistors becomes a significant integrated circuit design and fabrication factor. In addition, in fabricating the noted high current carrying bipolar transistors, the collector resistance is another important design and fabrication consideration.
A conventional technique for electrically isolating adjacent integrated bipolar transistors comprises the standard buried collector (SBC) technique. According to this fabrication technique, an N-type epitaxial semiconductor layer is formed over the surface of a P-type substrate. The epitaxial material is a high quality single crystal silicon material in which the bipolar transistors are formed. Next, the wafer is masked and patterned to define the deep P+ isolation diffusion regions for isolating a number of N-type epitaxial regions from each other. High temperature and extended time diffusion processes drive the P-type impurities all the way through the epitaxial layer to form islands of the N-type single crystal silicon material. With proper biasing, the deep diffusions are effective to isolate each of the transistor islands from the other. The epitaxial material is generally an N-type material in which base and emitter regions are formed to complete an NPN transistor.
High voltage bipolar transistors are generally characterized by a thicker epitaxial layer to provide sufficient breakdown voltage characteristics to the various semiconductor regions. However, in order to diffuse isolation regions through the thick epitaxial layer, extended diffusion periods must be utilized. As a consequence of extending the diffusion time periods to achieve deep diffusion isolation regions, such diffusions also spread laterally. The lateral spreading requires additional wafer area, thereby increasing the surface wafer area per device. Thus, additional wafer area must be considered in the design of high voltage bipolar transistors in order to provide adequate spacing between isolated devices to prevent isolation punchthrough which can effectively connect the devices together. It has been found that as much as seventy percent of the area required for a high voltage bipolar transistor is not utilized for the active device itself, but rather for allowing sufficient isolation area for the deep diffusions.
High current carrying bipolar transistors are generally fabricated with a buried collector which comprises a heavily doped layer between the substrate and the epitaxial layer. A deep N+ diffusion is formed through the epitaxial layer for contacting the buried collector so as to provide a surface contact thereto. With such a construction, the deep N+ diffusion provides a vertical conductor to the buried collector, but also provides an inherent resistance gradient which, in high current applications, can present a significant voltage drop within the vertical collector conductor. Because the vertical collector conductor is diffused downwardly from a surface mask opening, a diffusion gradient is inherently formed from the wafer surface to the buried collector. Because of the noted diffusion characteristics, the conductivity at the surface of the collector contact is high, but decreases as a function of distance into the epitaxial material. As a result, the conductivity of the collector conductor near the buried collector is reduced, thereby presenting an undesirable series resistance in the collector path.
In addition to the noted collector resistance problem, the deep N+ diffusion forming the collector conductor also spreads laterally. This lateral spreading not only requires additional wafer area, but also must be considered in providing adequate spacing of the diffused N+ conductor between the transistor base region and the P+ isolation region. Adequate spacing of the noted regions is required to ensure that the associated breakdown voltages are sufficiently high.
From the foregoing, it can be seen that a need exists for a bipolar transistor with improved isolation and conductivity characteristics. There is an associated need for a bipolar transistor whose construction yields lower collector resistance, requires a smaller wafer area and fewer masking steps as compared to conventional bipolar transistor fabrication techniques.